1. Field of the Invention
The present invention relates to a vertically formed inductor and an electronic device having the same, and more particularly, to an inductor capable of minimizing loss of a surface area and accomplishing high efficiency impedance by vertically forming the inductor on an insulating layer, and an electronic device having the same.
2. Discussion of Related Art
In recent times, with requirements of high integration of electronic components, a substrate, in which a plurality of layers are stacked, is generally used to perform a packaging process. The reason for performing the packaging process is that a larger number of active and passive components can be mounted on a smaller area. That is, the most important thing in performing the packaging process is that how many various components can be effectively disposed in the smaller area. In particular, a necessary passive device for implementing silicon CMOS technology to a high-frequency integrated circuit is an inductor. The inductor is an important device for performing impedance matching and RF choke in the high-frequency integrated circuit, which occupies the largest area in the integrated circuit.
However, since the impedance is a function of frequency, in order to obtain the same impedance, the magnitude of the inductor is in inverse proportion to the frequency. As a result, an increase in magnitude of the inductor causes an increase in size of the integrated circuit, thereby increasing manufacturing cost. Therefore, recently, various attempts to develop an integrated inductor for providing high inductance with a small size have been performed.
Among the attempts, a method of manufacturing an inductor by disposing a conductive line in a dielectric material is disclosed in Korean Patent Registration No. 0598113, implementing an inductor having high inductance in a limited space by rotating a metal line in a dielectric.
FIGS. 1 to 3 illustrate the constitution of a conventional inductor. FIG. 1 is a schematic perspective view of an electronic device including a linear inductor in accordance with a first embodiment of the conventional art, FIG. 2 is a schematic perspective view of an electronic device including a spiral inductor in accordance with a second embodiment of the conventional art, and FIG. 3 is a schematic perspective view of an electronic device including a meander inductor in accordance with a third embodiment of the conventional art. Referring to FIGS. 1 to 3, a conductive line 12 is formed on an upper surface of an insulating layer 11, 21 or 31 formed on a substrate 10, 20 or 30 in a straight line, a spiral line or a zigzag line having a plurality of meander parts. While not shown, an insulating layer is deposited to cover the conductive line, 12, 22 or 32, after forming the conductive line on the upper surface of the insulating layer 11, 21 or 31.
However, according to the conventional art, since the conductive line is formed on the upper surface of the insulating layer or formed in a direction parallel to the upper surface, the conductive line occupies a larger surface area of the insulating layer. In particular, when the conductive line is formed in a spiral line or a zigzag line, the conductive line occupies a larger surface area of the insulating layer in order to form an inductor having desired impedance. Accordingly, since the direction of the conductive line to be used as the inductor is limited within the upper surface of the insulating layer or in a direction parallel to the upper surface, spatial efficiency is decreased. In addition, since it is needed to widen the surface area of the insulating layer in order to have desired impedance, it is impossible to effectively increase the impedance. In particular, as described above, when the horizontal inductor is disposed on an electronic device or a board, since the wide area occupied by the inductor makes it difficult to integrate other components, it is difficult to effectively constitute the integrated circuit.